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Classification of AMD's CPU

AMD CPU's classification.

Default Category 2008-10-03 16:34 Comments 0 read 353. .

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Athlon XP core types.

Athlon XP core has 4 different types, but all things in common: all-Socket A nominal value and are marked with PR. .

Palomino 。.

This is the first core Athlon XP, use 0. .18 Um process technology, the core voltage of 1. .75 V or so, the secondary cache is 256KB, packages with OPGA, front side bus frequency is 266MHz. .

Thoroughbred 。.

This is the first by 0. .13 Um process technology in the Athlon XP core, is divided into Thoroughbred-A and the Thoroughbred-B in two versions, the core voltage of 1. .65 V-1. .75 V or so, the secondary cache is 256KB, packages with OPGA, 266MHz front side bus frequency and 333MHz. .

Thorton 。.

By 0. .13 Um process technology, the core voltage of 1. .65 V or so, the secondary cache is 256KB, packages with OPGA, front side bus frequency is 333MHz. Can be seen as shielding the second half of the cache Barton. .

Barton 。.

By 0. .13 Um process technology, the core voltage of 1. .65 V or so, the secondary cache is 512KB, packages with OPGA, front side bus frequency is 333MHz and 400MHz. .

New Duron core types.

AppleBred. .

0 .13um used. manufacturing process, the core voltage of 1 .5V, 2. cache of 64 KB, the package uses the OPGA, front side bus frequency is 266MHz. Do not use PR nominal value to the actual frequency callout annotations, 1.1. .6GHz .4GHz, and three 1. .8GHz.

Athlon 64 series CPU core type. .

Sledgehammer 。.

Sledgehammer is the core AMD server CPU is 64-bit CPU, generally 940 interface, 0. .13 Micron process. Sledgehammer powerful, integrated three HyperTransprot bus, the core using 12-stage pipeline, 128K level cache, integrated 1M 2 cache, can be used for one-way to 8-CPU server.Sledgehammer integrated memory controller, compared to traditionally located in the North of the memory controller has smaller lag, supports dual channel DDR memory, because the server CPU, which of course supports the ECC checksum.

Clawhammer. .

0 .13um used. manufacturing process, the core voltage of 1 .5V, 2. cache 1 MB, the package uses mPGA, using Hyper Transport bus, built-in 1 128bit memory controller. Using Socket 754, Socket 939 interface Socket 940 and. ..

Newcastle. .

The main difference between Clawhammer is L2 cache minimizes 512KB (this is also the market needs and AMD in order to accelerate the promotion of a 64-bit CPU and relative low price policy results), performance is basically the same.

Wincheste. .

Wincheste is relatively new AMD Athlon 64CPU core, 64-bit CPU, typically 0.939 interface, .09 micron manufacturing process. This core use 200MHz FSB, supports 1GHyperTransprot bus, 512 k L2 cache, the price is better. Wincheste integrated dual-channel memory controller, supports dual channel DDR memory, because the use of new technology, Wincheste heat than the old Athlon is small, the performance is also improved.

Troy. .

Troy is AMD's first 90nm Opteron core manufacturing process. Troy Sledgehammer core is based on adding a number of new techniques, 940 pins, commonly owned 128K L1 cache and 1MB (1,024 KB) level 2 cache. Similarly, using 200MHz FSB support 1GHyperTransprot bus, integrated memory controller, supports dual channel DDR400 memory, and can support ECC memory. In addition, Troy core also provides support for SSE-3, and the same as Intel's Xeon, in general, Troy is a good CPU core. .

Venice 。.

Venice core is the core of the Wincheste evolved on the basis of their technical parameters and Wincheste basically the same: the same as X86-64 architecture-based, integrated dual-channel memory controller, 512KB L2 cache, 90nm manufacturing technology, 200MHz FSB, support 1GHyperTransprot bus .Venice changes mainly in three areas: one is to use a Dual Stress Liner (DSL) technology, you can use the response speed of semiconductor transistor increased 24%, this is a CPU with greater frequency space, easy overclocking; the second is to provide support, and SSE-3 Intel CPU; the third is further improved the memory controller, to some extent, the increased processor performance, increasing the memory controller on the different DIMM module and compatibility of different configuration. In addition, Venice core also uses a dynamic voltage, different CPU may have different voltages. .

SanDiego 。.

SanDiego and Venice as the core of the core in Wincheste evolved on the basis of its technical parameters and very close to Venice, Venice has a new technology, new features, SanDiego has the same core. But AMD will SanDiego core positioning to the top Athlon 64 processor on, even for the server CPU. Venice can be seen as the core SanDiego advanced version, but from the 512KB cache capacity upgrade to 1MB.Of course, due to the increase in the L2 cache, the core kernel size SanDiego has also increased, from Venice core of 84 sq. mm to 115 mm square and, of course, prices are more expensive.

Sempron series CPU core type. .

Paris 。.

Barton core is the heart of Paris's successor, mainly for AMD's Sempron, Sempron early part of 754 interfaces the core to use Paris. Paris using 90nm manufacturing technology, supporting iSSE2 instruction set, typically 256K secondary cache, 200MHz FSB. Paris is a 32-bit core CPU, derived from the K8 core, and therefore have a memory control unit. CPU built-in memory controller, memory controller, the main advantage of CPU frequency can run, than the traditional North Bridge memory controller in a smaller delay.Using Paris core Sempron Socket A interface with the CPU performance when compared to the Sempron has improved significantly.

Palermo. .

Palermo core is currently mainly used for AMD's Sempron CPU, Socket 754 interface, 90nm fabrication process, about 1. .4V, voltage 128K 200MHz FSB, or 256 k L2 cache. The Palermo core from K8 core, the new Wincheste E6 stepping version has support for 64-bit. In addition to its high-end AMD processor with the same internal structure, but also with the EVP, Cool'n'Quiet; and AMD HyperTransport and other unique technologies for the user to bring more "calm" good deal more computing power device. As the bodiless and ATHLON64 processor, so Palermo also has a memory control unit. CPU built-in memory controller, memory controller, the main advantage of CPU frequency can run, than the traditional North Bridge memory controller in a smaller delay. .

Athlon 64 dual-core CPU X2 series core types.

Athlon 64 X2 series of dual-core CPU core types mainly Manchester and Toledo, the two are very similar, only difference is that two cache. .